[all-commits] [llvm/llvm-project] 6644a6: [RISCV] Add tests for suboptimal handling of negat...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6644a611213c7457574bc24b7098ae04753c49ae
      https://github.com/llvm/llvm-project/commit/6644a611213c7457574bc24b7098ae04753c49ae
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-07-11 (Sun, 11 Jul 2021)

  Changed paths:
    M llvm/test/CodeGen/RISCV/alu32.ll
    M llvm/test/CodeGen/RISCV/rv64zbb-zbp.ll

  Log Message:
  -----------
  [RISCV] Add tests for suboptimal handling of negative constants on the LHS of i32 shifts/rotates/subtracts on RV64. NFC

The constants end up getting zero extended to i64, but sign extend
would be better for constant materialization. We're using W
instructions so either behavior is correct since the upper bits
aren't read.