[all-commits] [llvm/llvm-project] c06394: [AIX] Adjust CSR order to avoid breaking ABI regar...

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  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c063946476e083a9a0c5bd397337d1ece4742ec6
      https://github.com/llvm/llvm-project/commit/c063946476e083a9a0c5bd397337d1ece4742ec6
  Author: Kai Luo <lkail at cn.ibm.com>
  Date:   2021-07-03 (Sat, 03 Jul 2021)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
    M llvm/lib/Target/PowerPC/PPCSubtarget.h
    M llvm/test/CodeGen/PowerPC/aix-cc-abi.ll
    M llvm/test/CodeGen/PowerPC/aix-cc-byval-mem.ll
    A llvm/test/CodeGen/PowerPC/aix-csr-alloc.ll
    M llvm/test/CodeGen/PowerPC/aix-tracetable-csr.ll
    M llvm/test/CodeGen/PowerPC/inc-of-add.ll

  Log Message:
  -----------
  [AIX] Adjust CSR order to avoid breaking ABI regarding traceback

Allocate non-volatile registers in order to be compatible with ABI, regarding gpr_save.

Quoted from https://www.ibm.com/docs/en/ssw_aix_72/assembler/assembler_pdf.pdf page55,
> The preferred method of using GPRs is to use the volatile registers first. Next, use the nonvolatile registers
> in descending order, starting with GPR31.

This patch is based on @jsji 's initial draft.

Tested on test-suite and SPEC, found no degradation.

Reviewed By: jsji, ZarkoCA, xingxue

Differential Revision: https://reviews.llvm.org/D100167