[all-commits] [llvm/llvm-project] d62701: AMDGPU/GlobalISel: Remove some problematic testcases

Matt Arsenault via All-commits all-commits at lists.llvm.org
Wed Jun 30 14:05:45 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d6270125fc2dd771973f20c33bdb7fd9f91b51d6
      https://github.com/llvm/llvm-project/commit/d6270125fc2dd771973f20c33bdb7fd9f91b51d6
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2021-06-30 (Wed, 30 Jun 2021)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Remove some problematic testcases

These testcases are a bit nonsensical and won't be handled correctly
for a long time. Remove them to unblock load/store legalization work.


  Commit: 748e0b07dcebfd9beaadc28be940354b9207b195
      https://github.com/llvm/llvm-project/commit/748e0b07dcebfd9beaadc28be940354b9207b195
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2021-06-30 (Wed, 30 Jun 2021)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpext.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptrunc.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uniform-load-noclobber.mir

  Log Message:
  -----------
  GlobalISel: Preserve memory type when reducing load/store width


Compare: https://github.com/llvm/llvm-project/compare/7aef99351ac3...748e0b07dceb


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