[all-commits] [llvm/llvm-project] 59fa43: [X86] Canonicalize SGT/UGT compares with constants...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 59fa435ea66629b4c45d9e6b62fa6cc1cdf5d5aa
      https://github.com/llvm/llvm-project/commit/59fa435ea66629b4c45d9e6b62fa6cc1cdf5d5aa
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-06-30 (Wed, 30 Jun 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
    M llvm/test/CodeGen/X86/atomic-eflags-reuse.ll
    M llvm/test/CodeGen/X86/cmov.ll
    M llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll
    M llvm/test/CodeGen/X86/mul-constant-result.ll
    M llvm/test/CodeGen/X86/or-branch.ll
    M llvm/test/CodeGen/X86/pr45995-2.ll
    M llvm/test/CodeGen/X86/pr5145.ll
    M llvm/test/CodeGen/X86/sadd_sat.ll
    M llvm/test/CodeGen/X86/sadd_sat_plus.ll
    M llvm/test/CodeGen/X86/sdiv_fix_sat.ll
    M llvm/test/CodeGen/X86/select.ll
    M llvm/test/CodeGen/X86/select_const.ll
    M llvm/test/CodeGen/X86/setcc-logic.ll
    M llvm/test/CodeGen/X86/setcc.ll
    M llvm/test/CodeGen/X86/smul_fix_sat.ll
    M llvm/test/CodeGen/X86/smul_fix_sat_constants.ll
    M llvm/test/CodeGen/X86/srem-seteq.ll
    M llvm/test/CodeGen/X86/ssub_sat.ll
    M llvm/test/CodeGen/X86/ssub_sat_plus.ll
    M llvm/test/CodeGen/X86/umul_fix_sat.ll
    M llvm/test/CodeGen/X86/urem-seteq-illegal-types.ll
    M llvm/test/CodeGen/X86/urem-seteq.ll
    M llvm/test/CodeGen/X86/vector-mulfix-legalize.ll
    M llvm/test/CodeGen/X86/zext-sext.ll

  Log Message:
  -----------
  [X86] Canonicalize SGT/UGT compares with constants to use SGE/UGE to reduce the number of EFLAGs reads. (PR48760)

This demonstrates a possible fix for PR48760 - for compares with constants, canonicalize the SGT/UGT condition code to use SGE/UGE which should reduce the number of EFLAGs bits we need to read.

As discussed on PR48760, some EFLAG bits are treated independently which can require additional uops to merge together for certain CMOVcc/SETcc/etc. modes.

I've limited this to cases where the constant increment doesn't result in a larger encoding or additional i64 constant materializations.

Differential Revision: https://reviews.llvm.org/D101074