[all-commits] [llvm/llvm-project] cba4b1: [NFC][AArch64] Un-autogenerate swifterror.ll tests

[Roman Lebedev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cba4b104a9c14a472521776015571873dc347506
      https://github.com/llvm/llvm-project/commit/cba4b104a9c14a472521776015571873dc347506
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2021-06-24 (Thu, 24 Jun 2021)

  Changed paths:
    M llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll
    M llvm/test/CodeGen/AArch64/swifterror.ll

  Log Message:
  -----------
  [NFC][AArch64] Un-autogenerate swifterror.ll tests

It appears the change needed in D104597 is minimal and obvious,
so let's not make them so verbose.


  Commit: 9c4c2f24725e9f98b96fb360894276d342c3ba50
      https://github.com/llvm/llvm-project/commit/9c4c2f24725e9f98b96fb360894276d342c3ba50
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2021-06-24 (Thu, 24 Jun 2021)

  Changed paths:
    M llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-condbr-lower-tree.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll
    M llvm/test/CodeGen/AArch64/addsub.ll
    M llvm/test/CodeGen/AArch64/arm64-instruction-mix-remarks.ll
    M llvm/test/CodeGen/AArch64/branch-relax-alignment.ll
    M llvm/test/CodeGen/AArch64/branch-relax-asm.ll
    M llvm/test/CodeGen/AArch64/branch-relax-bcc.ll
    M llvm/test/CodeGen/AArch64/branch-relax-cbz.ll
    M llvm/test/CodeGen/AArch64/cfguard-checks.ll
    M llvm/test/CodeGen/AArch64/cgp-usubo.ll
    M llvm/test/CodeGen/AArch64/check-sign-bit-before-extension.ll
    M llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll
    M llvm/test/CodeGen/AArch64/cond-br-tuning.ll
    M llvm/test/CodeGen/AArch64/f16-instructions.ll
    M llvm/test/CodeGen/AArch64/fast-isel-branch-cond-split.ll
    M llvm/test/CodeGen/AArch64/implicit-null-check.ll
    M llvm/test/CodeGen/AArch64/ldst-opt-after-block-placement.ll
    M llvm/test/CodeGen/AArch64/ldst-paired-aliasing.ll
    M llvm/test/CodeGen/AArch64/logical_shifted_reg.ll
    M llvm/test/CodeGen/AArch64/optimize-cond-branch.ll
    M llvm/test/CodeGen/AArch64/statepoint-call-lowering.ll
    M llvm/test/CodeGen/AArch64/sve-breakdown-scalable-vectortype.ll
    M llvm/test/CodeGen/AArch64/swifterror.ll
    M llvm/test/CodeGen/AArch64/use-cr-result-of-dom-icmp-st.ll
    M llvm/test/CodeGen/AArch64/vec-extract-branch.ll
    M llvm/test/CodeGen/ARM/cfguard-checks.ll
    M llvm/test/CodeGen/ARM/fp16-promote.ll
    M llvm/test/CodeGen/ARM/ifcvt-callback.ll
    M llvm/test/CodeGen/ARM/ifcvt-iter-indbr.ll
    M llvm/test/CodeGen/ARM/ifcvt1.ll
    M llvm/test/CodeGen/ARM/ifcvt3.ll
    M llvm/test/CodeGen/ARM/ifcvt5.ll
    M llvm/test/CodeGen/ARM/ifcvt6.ll
    M llvm/test/CodeGen/ARM/load-global2.ll
    M llvm/test/CodeGen/ARM/smml.ll
    M llvm/test/CodeGen/ARM/speculation-hardening-sls.ll
    M llvm/test/CodeGen/ARM/switch-minsize.ll
    M llvm/test/CodeGen/ARM/thumb2-size-opt.ll
    M llvm/test/CodeGen/Hexagon/dont_rotate_pregs_at_O2.ll
    M llvm/test/CodeGen/Hexagon/noFalignAfterCallAtO2.ll
    M llvm/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
    M llvm/test/CodeGen/Thumb2/tpsoft.ll
    M llvm/test/CodeGen/Thumb2/v8_IT_4.ll
    M llvm/test/Transforms/LoopUnroll/ARM/upperbound.ll
    M llvm/test/Transforms/PGOProfile/chr.ll
    M llvm/test/Transforms/PhaseOrdering/X86/simplifycfg-late.ll
    M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
    M llvm/test/Transforms/PhaseOrdering/inlining-alignment-assumptions.ll
    M llvm/test/Transforms/PruneEH/ipo-nounwind.ll
    M llvm/test/Transforms/SimplifyCFG/DeadSetCC.ll
    M llvm/test/Transforms/SimplifyCFG/FoldValueComparisonIntoPredecessors-domtree-preservation-edgecase-2.ll
    M llvm/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll
    M llvm/test/Transforms/SimplifyCFG/HoistCode.ll
    M llvm/test/Transforms/SimplifyCFG/basictest.ll
    M llvm/test/Transforms/SimplifyCFG/branch-fold.ll
    M llvm/test/Transforms/SimplifyCFG/branch-phi-thread.ll
    M llvm/test/Transforms/SimplifyCFG/duplicate-landingpad.ll
    M llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest-two-preds-cost.ll
    M llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest.ll
    M llvm/test/Transforms/SimplifyCFG/guards.ll
    M llvm/test/Transforms/SimplifyCFG/hoist-common-code.ll
    M llvm/test/Transforms/SimplifyCFG/indirectbr.ll
    M llvm/test/Transforms/SimplifyCFG/invoke.ll
    M llvm/test/Transforms/SimplifyCFG/pr39807.ll
    M llvm/test/Transforms/SimplifyCFG/pr46638.ll
    M llvm/test/Transforms/SimplifyCFG/preserve-branchweights.ll
    M llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
    M llvm/test/Transforms/SimplifyCFG/switch-on-const-select.ll
    M llvm/test/Transforms/SimplifyCFG/switch-range-to-icmp.ll
    M llvm/test/Transforms/SimplifyCFG/switch_create-custom-dl.ll
    M llvm/test/Transforms/SimplifyCFG/switch_create.ll
    M llvm/test/Transforms/SimplifyCFG/switch_switch_fold.ll
    M llvm/test/Transforms/SimplifyCFG/switch_thread.ll
    M llvm/test/Transforms/SimplifyCFG/unprofitable-pr.ll

  Log Message:
  -----------
  [SimplifyCFG] Tail-merging all blocks with `ret` terminator

Based ontop of D104598, which is a NFCI-ish refactoring.
Here, a restriction, that only empty blocks can be merged, is lifted.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D104597


Compare: https://github.com/llvm/llvm-project/compare/31f888ea9af4...9c4c2f24725e