[all-commits] [llvm/llvm-project] 39f8a7: AMDGPU: Try to eliminate clearing of high bits of ...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 39f8a792f0ac4efed11ac906ba76137fc0c9f6a8
      https://github.com/llvm/llvm-project/commit/39f8a792f0ac4efed11ac906ba76137fc0c9f6a8
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2021-06-22 (Tue, 22 Jun 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
    M llvm/lib/Target/AMDGPU/GCNSubtarget.h
    M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
    M llvm/test/CodeGen/AMDGPU/fmax3.ll
    M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
    M llvm/test/CodeGen/AMDGPU/fmin3.ll
    M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
    M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
    M llvm/test/CodeGen/AMDGPU/high-bits-zeroed-16-bit-ops.mir
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
    M llvm/test/CodeGen/AMDGPU/preserve-hi16.ll
    M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
    M llvm/test/CodeGen/AMDGPU/strict_fma.f16.ll
    M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
    M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
    M llvm/test/CodeGen/AMDGPU/uaddsat.ll
    M llvm/test/CodeGen/AMDGPU/usubsat.ll

  Log Message:
  -----------
  AMDGPU: Try to eliminate clearing of high bits of 16-bit instructions

These used to consistently be zeroed pre-gfx9, but gfx9 made the
situation complicated since now some still do and some don't. This
also manages to pick up a few cases that the pattern fails to optimize
away.

We handle some cases with instruction patterns, but some get
through. In particular this improves the integer cases.