[all-commits] [llvm/llvm-project] 74909e: Rename MachineMemOperand::getOrdering -> getSucces...

[Eli Friedman via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 74909e4b6e9bc0da6c197cf6c4419991a8dc335f
      https://github.com/llvm/llvm-project/commit/74909e4b6e9bc0da6c197cf6c4419991a8dc335f
  Author: Eli Friedman <efriedma at quicinc.com>
  Date:   2021-06-21 (Mon, 21 Jun 2021)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineMemOperand.h
    M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
    M llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
    M llvm/lib/CodeGen/MachineFunction.cpp
    M llvm/lib/CodeGen/MachineOperand.cpp
    M llvm/lib/CodeGen/MachineStableHash.cpp
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/lib/Target/ARM/ARMInstrInfo.td
    M llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
    M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    M llvm/lib/Target/Sparc/SparcISelLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/XCore/XCoreISelLowering.cpp

  Log Message:
  -----------
  Rename MachineMemOperand::getOrdering -> getSuccessOrdering.

Since this method can apply to cmpxchg operations, make sure it's clear
what value we're actually retrieving.  This will help ensure we don't
accidentally ignore the failure ordering of cmpxchg in the future.

We could potentially introduce a getOrdering() method on AtomicSDNode
that asserts the operation isn't cmpxchg, but not sure that's
worthwhile.

Differential Revision: https://reviews.llvm.org/D103338