[all-commits] [llvm/llvm-project] 88da6c: [X86] Schedule-model second (mask) output of GATHE...

[Roman Lebedev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 88da6c1ead3f1b0431e6cfa054d2645612f049ce
      https://github.com/llvm/llvm-project/commit/88da6c1ead3f1b0431e6cfa054d2645612f049ce
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2021-06-15 (Tue, 15 Jun 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrAVX512.td
    M llvm/lib/Target/X86/X86InstrSSE.td
    M llvm/lib/Target/X86/X86SchedBroadwell.td
    M llvm/lib/Target/X86/X86SchedHaswell.td
    M llvm/lib/Target/X86/X86SchedSandyBridge.td
    M llvm/lib/Target/X86/X86SchedSkylakeClient.td
    M llvm/lib/Target/X86/X86SchedSkylakeServer.td
    M llvm/lib/Target/X86/X86Schedule.td
    M llvm/lib/Target/X86/X86ScheduleAtom.td
    M llvm/lib/Target/X86/X86ScheduleBdVer2.td
    M llvm/lib/Target/X86/X86ScheduleBtVer2.td
    M llvm/lib/Target/X86/X86ScheduleSLM.td
    M llvm/lib/Target/X86/X86ScheduleZnver1.td
    M llvm/lib/Target/X86/X86ScheduleZnver2.td
    M llvm/lib/Target/X86/X86ScheduleZnver3.td

  Log Message:
  -----------
  [X86] Schedule-model second (mask) output of GATHER instruction

Much like `mulx`'s `WriteIMulH`, there are two outputs of
AVX2 GATHER instructions. This was changed back in rL160110,
but the sched model change wasn't present.

So right now, for sched models that are marked as complete
(`znver3` only now), codegen'ning `GATHER` results in a crash:
```
DefIdx 1 exceeds machine model writes for early-clobber renamable $ymm3, dead early-clobber renamable $ymm2 = VPGATHERDDYrm killed renamable $ymm3(tied-def 0), undef renamable $rax, 4, renamable $ymm0, 0, $noreg, killed renamable $ymm2(tied-def 1) :: (load 32, align 1)
```
https://godbolt.org/z/Ks7zW7WGh

I'm guessing we need to deal with this like we deal with `WriteIMulH`.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D104205