[all-commits] [llvm/llvm-project] c03b63: [ELF][RISCV] Resolve branch relocations referencin...

[Fangrui Song via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c03b6305d8419fda84a67f4fe357b69a86e4b54f
      https://github.com/llvm/llvm-project/commit/c03b6305d8419fda84a67f4fe357b69a86e4b54f
  Author: Fangrui Song <i at maskray.me>
  Date:   2021-06-10 (Thu, 10 Jun 2021)

  Changed paths:
    M lld/ELF/InputSection.cpp
    M lld/test/ELF/riscv-undefined-weak.s

  Log Message:
  -----------
  [ELF][RISCV] Resolve branch relocations referencing undefined weak to current location if not using PLT

In a -no-pie link we optimize R_PLT_PC to R_PC. Currently we resolve a branch
relocation to the link-time zero address. However such a choice tends to cause
relocation overflow possibility for RISC architectures.

* aarch64: GNU ld: rewrite the instruction to a NOP; ld.lld: branch to the next instruction
* mips: GNU ld: branch to the start of the text segment (?); ld.lld: branch to zero
* ppc32: GNU ld: rewrite the instruction to a NOP; ld.lld: branch to the current instruction
* ppc64: GNU ld: rewrite the instruction to a NOP; ld.lld: branch to the current instruction
* riscv: GNU ld: branch to the absolute zero address (with instruction rewriting)
* i386/x86_64: GNU ld/ld.lld: branch to the link-time zero address

I think that resolving to the same location is a good choice. The instruction,
if triggered, is clearly an undefined behavior. Resolving to the same location
can cause an infinite loop (making the user aware of the issue) while ensuring
no overflow.

Reviewed By: jrtc27

Differential Revision: https://reviews.llvm.org/D103001