[all-commits] [llvm/llvm-project] 423269: [x86] add tests for store merging miscompile (PR50...

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  Branch: refs/heads/release/12.x
  Home:   https://github.com/llvm/llvm-project
  Commit: 42326932eca6d49fc59f8f560917be16764e087e
      https://github.com/llvm/llvm-project/commit/42326932eca6d49fc59f8f560917be16764e087e
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-06-09 (Wed, 09 Jun 2021)

  Changed paths:
    M llvm/test/CodeGen/X86/stores-merging.ll

  Log Message:
  -----------
  [x86] add tests for store merging miscompile (PR50623); NFC

(cherry picked from commit 2ef81cb297954cdbc2eca2f204a5ecba4ec1ccd8)


  Commit: b54ccef144d2753a9742a3c0e75bcf377120fc6c
      https://github.com/llvm/llvm-project/commit/b54ccef144d2753a9742a3c0e75bcf377120fc6c
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-06-09 (Wed, 09 Jun 2021)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/X86/stores-merging.ll

  Log Message:
  -----------
  [SDAG] fix miscompile from merging stores of different sizes

As shown in:
https://llvm.org/PR50623
...and the similar tests here, we were not accounting for
store merging of different sizes that do not cover the
entire range of the wide value to be stored.

This is the easy fix: just make sure that all of the
original stores are the same size, so when we calculate
the wide width, it's a simple N * M check.

This still allows all of the motivating optimizations from:
D86420 / 54a5dd485c4d
D87112 / 7a06b166b1af

We could enhance this code to track individual bytes and
allow merging multiple sizes.

(cherry picked from commit dd763ac79196b3d3bc0370b9dbd35e0c083e52a4)


Compare: https://github.com/llvm/llvm-project/compare/84e8b1cf07b9...b54ccef144d2