[all-commits] [llvm/llvm-project] dd763a: [SDAG] fix miscompile from merging stores of diffe...

RotateRight via All-commits all-commits at lists.llvm.org
Wed Jun 9 06:56:32 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: dd763ac79196b3d3bc0370b9dbd35e0c083e52a4
      https://github.com/llvm/llvm-project/commit/dd763ac79196b3d3bc0370b9dbd35e0c083e52a4
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-06-09 (Wed, 09 Jun 2021)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/X86/stores-merging.ll

  Log Message:
  -----------
  [SDAG] fix miscompile from merging stores of different sizes

As shown in:
https://llvm.org/PR50623
...and the similar tests here, we were not accounting for
store merging of different sizes that do not cover the
entire range of the wide value to be stored.

This is the easy fix: just make sure that all of the
original stores are the same size, so when we calculate
the wide width, it's a simple N * M check.

This still allows all of the motivating optimizations from:
D86420 / 54a5dd485c4d
D87112 / 7a06b166b1af

We could enhance this code to track individual bytes and
allow merging multiple sizes.




More information about the All-commits mailing list