[all-commits] [llvm/llvm-project] c87c29: [PowerPC][Dwarf] Assign MMA register's dwarf regis...

[bzEq via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c87c294397ea4c3dae31f5a7fd6e38602338fd57
      https://github.com/llvm/llvm-project/commit/c87c294397ea4c3dae31f5a7fd6e38602338fd57
  Author: Kai Luo <lkail at cn.ibm.com>
  Date:   2021-06-09 (Wed, 09 Jun 2021)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCRegisterInfo.td

  Log Message:
  -----------
  [PowerPC][Dwarf] Assign MMA register's dwarf register number to negative value

According to ELF V2 ABI, `0` should be the dwarf number of `r0`. Currently MMA's register also uses `0` as its dwarf number, this confuses `RegisterInfoEmitter` and generates wrong dwarf -> llvm mapping.
```
extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour1Dwarf2L[] = {
  { 0U, PPC::VSRp31 },
```
This leads to wrong cfi output in https://reviews.llvm.org/D100290.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D103761