[all-commits] [llvm/llvm-project] 2927d4: GlobalISel: Hide virtual register creation in MIRB...

Matt Arsenault via All-commits all-commits at lists.llvm.org
Tue Jun 8 11:44:42 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2927d40f044650e787985235a1d3d76db345cf87
      https://github.com/llvm/llvm-project/commit/2927d40f044650e787985235a1d3d76db345cf87
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2021-06-08 (Tue, 08 Jun 2021)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

  Log Message:
  -----------
  GlobalISel: Hide virtual register creation in MIRBuilder


  Commit: 31a9659de550b25b6bc0ad5cab73d133095c351f
      https://github.com/llvm/llvm-project/commit/31a9659de550b25b6bc0ad5cab73d133095c351f
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2021-06-08 (Tue, 08 Jun 2021)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
    M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
    M llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp

  Log Message:
  -----------
  GlobalISel: Avoid use of G_INSERT in insertParts

G_INSERT legalization is incomplete and doesn't work very
well. Instead try to use sequences of G_MERGE_VALUES/G_UNMERGE_VALUES
padding with undef values (although this can get pretty large).

For the case of load/store narrowing, this is still performing the
load/stores in irregularly sized pieces. It might be cleaner to split
this down into equal sized pieces, and rely on load/store merging to
optimize it.


Compare: https://github.com/llvm/llvm-project/compare/f44770c32992...31a9659de550


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