[all-commits] [llvm/llvm-project] 7c4e9a: [RISCV] Use 0 for Log2SEW for vle1/vse1 intrinsics...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7c4e9a68264ffeef6178865be76c45c4fb6390af
      https://github.com/llvm/llvm-project/commit/7c4e9a68264ffeef6178865be76c45c4fb6390af
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-06-07 (Mon, 07 Jun 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/test/CodeGen/RISCV/rvv/vse1-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vse1-rv64.ll

  Log Message:
  -----------
  [RISCV] Use 0 for Log2SEW for vle1/vse1 intrinsics to enable vsetvli optimization.

Missed in D103299.