[all-commits] [llvm/llvm-project] f6555b: GlobalISel: Remove unnecessary .getReg(0)s

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f6555b917b81f0d403c30605243eb766c42ab0a4
      https://github.com/llvm/llvm-project/commit/f6555b917b81f0d403c30605243eb766c42ab0a4
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2021-06-07 (Mon, 07 Jun 2021)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

  Log Message:
  -----------
  GlobalISel: Remove unnecessary .getReg(0)s


  Commit: dc98adfb448bdb845605185bb173e99614a17790
      https://github.com/llvm/llvm-project/commit/dc98adfb448bdb845605185bb173e99614a17790
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2021-06-07 (Mon, 07 Jun 2021)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp

  Log Message:
  -----------
  GlobalISel: Use MMO helper for getting the size in bits


  Commit: ccf28ea800ee07835a53c83b775ef3ec51909b1c
      https://github.com/llvm/llvm-project/commit/ccf28ea800ee07835a53c83b775ef3ec51909b1c
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2021-06-07 (Mon, 07 Jun 2021)

  Changed paths:
    A llvm/test/CodeGen/AMDGPU/load-store-opt-scc.mir
    R llvm/test/CodeGen/MIR/AMDGPU/load-store-opt-scc.mir

  Log Message:
  -----------
  AMDGPU: Move codegen test out of MIR test directory

This is testing an actual pass, not the MIR parser/printer.


Compare: https://github.com/llvm/llvm-project/compare/38540d71c74c...ccf28ea800ee