[all-commits] [llvm/llvm-project] 8c6bd6: [RISCV] Don't enable loop vectorizer interleaving ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8c6bd6c22f384cc09e4a97de630ae63d7721dfd0
      https://github.com/llvm/llvm-project/commit/8c6bd6c22f384cc09e4a97de630ae63d7721dfd0
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-06-07 (Mon, 07 Jun 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVSubtarget.h

  Log Message:
  -----------
  [RISCV] Don't enable loop vectorizer interleaving if the V extension isn't enabled.

This can cause the vectorizer to generate interleaved scalar
code which might be ok for some CPUs, but definitely not all.
Disable it to restore the previous scalar behavior.

Differential Revision: https://reviews.llvm.org/D103787