[all-commits] [llvm/llvm-project] 52f297: [InstCombine] reduce code duplication; NFC

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  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 52f2970036019b54f280bd531c7c65c09e18567a
      https://github.com/llvm/llvm-project/commit/52f2970036019b54f280bd531c7c65c09e18567a
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-05-29 (Sat, 29 May 2021)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp

  Log Message:
  -----------
  [InstCombine] reduce code duplication; NFC


  Commit: c7da0c383a1bb360887a51f094d5891a9108d767
      https://github.com/llvm/llvm-project/commit/c7da0c383a1bb360887a51f094d5891a9108d767
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-05-29 (Sat, 29 May 2021)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
    M llvm/test/Transforms/InstCombine/zext.ll

  Log Message:
  -----------
  [InstCombine] fold zext of masked bit set/clear

This does not solve PR17101, but it is one of the
underlying diffs noted here:
https://bugs.llvm.org/show_bug.cgi?id=17101#c8

We could ease the one-use checks for the 'clear'
(no 'not' op) half of the transform, but I do not
know if that asymmetry would make things better
or worse.

Proofs:
https://rise4fun.com/Alive/uVB

Name: masked bit set
%sh1 = shl i32 1, %y
%and = and i32 %sh1, %x
%cmp = icmp ne i32 %and, 0
%r = zext i1 %cmp to i32
=>
%s = lshr i32 %x, %y
%r = and i32 %s, 1

Name: masked bit clear
%sh1 = shl i32 1, %y
%and = and i32 %sh1, %x
%cmp = icmp eq i32 %and, 0
%r = zext i1 %cmp to i32
=>
%xn = xor i32 %x, -1
%s = lshr i32 %xn, %y
%r = and i32 %s, 1

Note: this is a re-post of a patch that I committed at:
rGa041c4ec6f7a

The commit was reverted because it exposed another bug:
rGb212eb7159b40

But that has since been corrected with:
rG8a156d1c2795189 ( D101191 )

Differential Revision: https://reviews.llvm.org/D72396


Compare: https://github.com/llvm/llvm-project/compare/fae3534b3056...c7da0c383a1b