[all-commits] [llvm/llvm-project] 0fa5aa: [RISCV] Teach VSETVLI insertion to look through PH...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0fa5aac292b8e1bafb00b55233c78466b06bc323
      https://github.com/llvm/llvm-project/commit/0fa5aac292b8e1bafb00b55233c78466b06bc323
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-05-27 (Thu, 27 May 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll

  Log Message:
  -----------
  [RISCV] Teach VSETVLI insertion to look through PHIs to prove we don't need to insert a vsetvli.

If an instruction's AVL operand is a PHI node in the same block,
we may be able to peek through the PHI to find vsetvli instructions
that produce the AVL in other basic blocks. If we can prove those
vsetvli instructions have the same VTYPE and were the last vsetvli
in their respective blocks, then we don't need to insert a vsetvli
for this pseudo instruction.

Reviewed By: rogfer01

Differential Revision: https://reviews.llvm.org/D103277