[all-commits] [llvm/llvm-project] fdf10e: [RISCV] Use X0 as destination of inserted vsetvli ...

Craig Topper via All-commits all-commits at lists.llvm.org
Wed May 26 13:10:13 PDT 2021 

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fdf10e6197d0bef20759a1457866c5e7daafd727
      https://github.com/llvm/llvm-project/commit/fdf10e6197d0bef20759a1457866c5e7daafd727
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-05-26 (Wed, 26 May 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    M llvm/test/CodeGen/RISCV/rvv/access-fixed-objects-by-rvv.ll
    M llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
    M llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll
    M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extload-truncstore.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-exttrunc.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-vrgather.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-buildvec.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-load-store.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-int.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-stepvector-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-stepvector-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnsra-vnsrl.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
    M llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/insertelt-i1.ll
    M llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll
    M llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir
    M llvm/test/CodeGen/RISCV/rvv/memory-args.ll
    M llvm/test/CodeGen/RISCV/rvv/regalloc-fast-crash.ll
    M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
    M llvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll
    M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
    M llvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll
    M llvm/test/CodeGen/RISCV/rvv/select-sra.ll
    M llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vadc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoand-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoand-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vamomax-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamomax-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vamomaxu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamomaxu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vamomin-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamomin-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vamominu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamominu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoswap-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoswap-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoxor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoxor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vand-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vand-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vand-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vdiv-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vdivu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfclass-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfclass-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfirst-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmin-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfrec7-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfrec7-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfredmax-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfredmin-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfredosum-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfredsum-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfredsum-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfrsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vle-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vle-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vle1-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vle1-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll
    M llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64-dead.ll
    M llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmacc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmand-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmand-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmandnot-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmandnot-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmaxu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmclr-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmerge-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmin-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vminu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmnand-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmnand-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmnor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmnor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmornot-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmornot-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsbc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmset-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmset-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsge-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmul-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmulh-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmulhu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmxnor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmxnor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmxor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmxor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vnmsac-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vnmsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vnsrl-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vnsrl-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vor-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vpopc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vpopc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vredand-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vredand-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vredmax-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vredmax-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vredmin-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vredmin-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vredminu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vredminu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vredor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vredor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vredsum-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vredsum-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vreductions-int-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vredxor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vredxor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vrem-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vremu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vrsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsaddu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsbc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsbc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vse-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vse-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vse1-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vse1-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
    M llvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vslide1down-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsll-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsll-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsmul-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsoxei-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsoxei-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsra-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsra-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vsrl-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsrl-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vsse-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsse-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsseg-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vssra-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vssra-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vssrl-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vssrl-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vssseg-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vssseg-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vssub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vssubu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vssubu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vsuxei-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsuxei-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwaddu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwaddu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmacc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmacc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmul-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmul-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmulu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmulu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwredsum-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwsubu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwsubu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vxor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vxor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir
    M llvm/test/CodeGen/RISCV/rvv/zvlsseg-zero-vl.ll
    M llvm/test/CodeGen/RISCV/spill-fpr-scalar.ll
    M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
    M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll

  Log Message:
  -----------
  [RISCV] Use X0 as destination of inserted vsetvli when possible.

We aren't going to connect the result to anything so we might
as well avoid allocating a register.

Reviewed By: frasercrmck, HsiangKai

Differential Revision: https://reviews.llvm.org/D102031

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