[all-commits] [llvm/llvm-project] def626: [CostModel][X86] Improve accuracy of 256-bit non-u...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: def6269779aff0d4f1994cf73f7910add044ff72
      https://github.com/llvm/llvm-project/commit/def6269779aff0d4f1994cf73f7910add044ff72
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-05-25 (Tue, 25 May 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/X86/div.ll
    M llvm/test/Analysis/CostModel/X86/fshl.ll
    M llvm/test/Analysis/CostModel/X86/fshr.ll
    M llvm/test/Analysis/CostModel/X86/rem.ll
    M llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll
    M llvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll
    M llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll
    M llvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll
    M llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll
    M llvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll
    M llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
    M llvm/test/Transforms/SLPVectorizer/X86/powof2div.ll
    M llvm/test/Transforms/SLPVectorizer/X86/shift-ashr.ll
    M llvm/test/Transforms/SLPVectorizer/X86/shift-lshr.ll
    M llvm/test/Transforms/SLPVectorizer/X86/shift-shl.ll

  Log Message:
  -----------
  [CostModel][X86] Improve accuracy of 256-bit non-uniform vector shifts on AVX1

Determined from llvm-mca analysis, AVX1 capable targets have a higher throughput for VPBLENDVB and shuffle ops, making it cheaper to perform shift+shuffle/select shift patterns.


  Commit: 57250f2f3c6d03e27d8649f6f7d6bdbabf8936cc
      https://github.com/llvm/llvm-project/commit/57250f2f3c6d03e27d8649f6f7d6bdbabf8936cc
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-05-25 (Tue, 25 May 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86ScheduleAtom.td
    M llvm/test/tools/llvm-mca/X86/Atom/resources-ssse3.s

  Log Message:
  -----------
  [X86][Atom] Fix vector PSHUFB resource/throughputs

Match whats documented in the Intel AOM - the XMM variant of PSHUFB requires BOTH ports - this was being incorrectly modelled as EITHER port.

Now that we can use in-order models in llvm-mca, the atom model is a good "worst case scenario" analysis for x86.


Compare: https://github.com/llvm/llvm-project/compare/8e83ff58c907...57250f2f3c6d