[all-commits] [llvm/llvm-project] e02a4f: [X86][SSE] Regenerate vector shift codegen tests. ...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e02a4f6bda10d92ae8e37c6e96b16f11a98dfefc
      https://github.com/llvm/llvm-project/commit/e02a4f6bda10d92ae8e37c6e96b16f11a98dfefc
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-05-25 (Tue, 25 May 2021)

  Changed paths:
    M llvm/test/CodeGen/X86/avx2-vector-shifts.ll
    M llvm/test/CodeGen/X86/prefer-avx256-shift.ll
    M llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
    M llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
    M llvm/test/CodeGen/X86/vector-shift-ashr-512.ll
    M llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
    M llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
    M llvm/test/CodeGen/X86/vector-shift-lshr-256.ll
    M llvm/test/CodeGen/X86/vector-shift-lshr-512.ll
    M llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
    M llvm/test/CodeGen/X86/vector-shift-shl-128.ll
    M llvm/test/CodeGen/X86/vector-shift-shl-256.ll
    M llvm/test/CodeGen/X86/vector-shift-shl-512.ll
    M llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll

  Log Message:
  -----------
  [X86][SSE] Regenerate vector shift codegen tests. NFCI.


  Commit: c909dddddacf6d0bce864e4202406dd285801650
      https://github.com/llvm/llvm-project/commit/c909dddddacf6d0bce864e4202406dd285801650
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-05-25 (Tue, 25 May 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/X86/div.ll
    M llvm/test/Analysis/CostModel/X86/fshl.ll
    M llvm/test/Analysis/CostModel/X86/fshr.ll
    M llvm/test/Analysis/CostModel/X86/rem.ll
    M llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll
    M llvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll
    M llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll
    M llvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll
    M llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll
    M llvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll

  Log Message:
  -----------
  [CostModel][X86] Improve accuracy of vXi64 vector non-uniform shift costs on AVX2+ targets

rG1ad4f887bd7692a9e63fb42586f0ece366f2fe01 incorrectly assumed that vXi64 non-uniform shifts were slow like vXi32 were - but llvm-mca (+Agner) both confirm that Haswell/Broadwell are full rate.


Compare: https://github.com/llvm/llvm-project/compare/21aa107eb79f...c909dddddacf