[all-commits] [llvm/llvm-project] b510e4: [RISCV] Add a vsetvli insert pass that can be exte...

Craig Topper via All-commits all-commits at lists.llvm.org
Mon May 24 11:48:22 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b510e4cf1b96ab9c7e6d1c348f31c68f438b98cb
      https://github.com/llvm/llvm-project/commit/b510e4cf1b96ab9c7e6d1c348f31c68f438b98cb
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-05-24 (Mon, 24 May 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/CMakeLists.txt
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
    M llvm/lib/Target/RISCV/RISCV.h
    R llvm/lib/Target/RISCV/RISCVCleanupVSETVLI.cpp
    M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    A llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    R llvm/test/CodeGen/RISCV/rvv/add-vsetvli-gpr.mir
    R llvm/test/CodeGen/RISCV/rvv/add-vsetvli-vlmax.ll
    M llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
    R llvm/test/CodeGen/RISCV/rvv/cleanup-vsetivli.mir
    R llvm/test/CodeGen/RISCV/rvv/cleanup-vsetvli.mir
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll
    M llvm/test/CodeGen/RISCV/rvv/frameindex-addr.ll
    M llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir
    M llvm/test/CodeGen/RISCV/rvv/tail-agnostic-impdef-copy.mir
    M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vreductions-int-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vreductions-int-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
    M llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir

  Log Message:
  -----------
  [RISCV] Add a vsetvli insert pass that can be extended to be aware of incoming VL/VTYPE from other basic blocks.

This is a replacement for D101938 for inserting vsetvli
instructions where needed. This new version changes how
we track the information in such a way that we can extend
it to be aware of VL/VTYPE changes in other blocks. Given
how much it changes the previous patch, I've decided to
abandon the previous patch and post this from scratch.

For now the pass consists of a single phase that assumes
the incoming state from other basic blocks is unknown. A
follow up patch will extend this with a phase to collect
information about how VL/VTYPE change in each block and
a second phase to propagate this information to the entire
function. This will be used by a third phase to do the
vsetvli insertion.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D102737




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