[all-commits] [llvm/llvm-project] 81bc73: [IR][Verifier] Relax restriction on alloca address...

[Andy Wingo via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 81bc732816107f6aff4fd61980f7b03cc92332b5
      https://github.com/llvm/llvm-project/commit/81bc732816107f6aff4fd61980f7b03cc92332b5
  Author: Andy Wingo <wingo at igalia.com>
  Date:   2021-05-21 (Fri, 21 May 2021)

  Changed paths:
    M llvm/docs/LangRef.rst
    M llvm/lib/IR/Verifier.cpp
    R llvm/test/Assembler/datalayout-alloca-addrspace-mismatch-0.ll
    R llvm/test/Assembler/datalayout-alloca-addrspace-mismatch-1.ll
    R llvm/test/Assembler/datalayout-alloca-addrspace-mismatch-2.ll
    M llvm/test/Assembler/drop-debug-info-nonzero-alloca.ll
    R llvm/test/CodeGen/AMDGPU/invalid-alloca.ll

  Log Message:
  -----------
  [IR][Verifier] Relax restriction on alloca address spaces

In the WebAssembly target, we would like to allow alloca in two address
spaces.  The alloca instruction already has an address space argument,
but the verifier asserts that the address space of an alloca is the
default alloca address space from the datalayout.  This patch removes
this restriction.  Targets that would like to impose additional
restrictions should do so via target-specific verification passes.

Differential Revision: https://reviews.llvm.org/D101045