[all-commits] [llvm/llvm-project] ab60e3: GlobalISel: Help reduce operation width for instru...
Christudasan Devadasan via All-commits
all-commits at lists.llvm.org
Thu May 20 22:06:06 PDT 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: ab60e361c261ae0d65608dc01023766eae2e93b5
https://github.com/llvm/llvm-project/commit/ab60e361c261ae0d65608dc01023766eae2e93b5
Author: Christudasan Devadasan <Christudasan.Devadasan at amd.com>
Date: 2021-05-21 (Fri, 21 May 2021)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Log Message:
-----------
GlobalISel: Help reduce operation width for instruction with two results.
The function `reduceOperationWidth` helps to legalize a vector
operation either by narrowing its type or by scalarizing the
operation itself. It currently supports instructions with one result.
This patch, in addition allows the same for instructions with two
results (for instance, G_SDIVREM).
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D100725
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