[all-commits] [llvm/llvm-project] 3f7b7e: [AMDGPU] Update SCC defs to VCC when uses are chan...

[bcahoon via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3f7b7e7393f802da480c2e24463a5722da0016e7
      https://github.com/llvm/llvm-project/commit/3f7b7e7393f802da480c2e24463a5722da0016e7
  Author: Brendon Cahoon <brendon.cahoon at amd.com>
  Date:   2021-05-14 (Fri, 14 May 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h
    M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
    A llvm/test/CodeGen/AMDGPU/change-scc-to-vcc.mir
    M llvm/test/CodeGen/AMDGPU/sdiv64.ll
    M llvm/test/CodeGen/AMDGPU/srem64.ll
    M llvm/test/CodeGen/AMDGPU/udiv64.ll
    M llvm/test/CodeGen/AMDGPU/urem64.ll

  Log Message:
  -----------
  [AMDGPU] Update SCC defs to VCC when uses are changed to VCC

The FixSGPRCopies pass converts instructions to VALU when
removing illegal VGPR to SGPR copies. Instructions that use SCC
are changed to use VCC instead. When that happens, the pass must
also change instructions that define SCC to define VCC.

The pass was not changing the SCC definition when an ADDC is
converted due to a input that is a VGPR to SGPR copy. But, the
initial ADD insruction, which define SCC, is not converted.
This causes a compilation failure due to a use of an undefined
physical register.

This patch adds code that inserts the SCC definition in the
MoveToVALU worklist when a SCC use is converted to a VCC use.

Differential Revision: https://reviews.llvm.org/D102111