[all-commits] [llvm/llvm-project] 0816b9: Allow same memory space for SRC and DST of dma_sta...

Ian Bearman via All-commits all-commits at lists.llvm.org
Fri May 14 10:41:28 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0816b96a10b8ec77cc4f663eb209356456e951de
      https://github.com/llvm/llvm-project/commit/0816b96a10b8ec77cc4f663eb209356456e951de
  Author: Ian Bearman <ian.bearman at microsoft.com>
  Date:   2021-05-14 (Fri, 14 May 2021)

  Changed paths:
    M mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
    M mlir/include/mlir/Dialect/MemRef/IR/MemRef.h
    M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
    M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
    M mlir/test/IR/invalid-ops.mlir

  Log Message:
  -----------
  Allow same memory space for SRC and DST of dma_start operations

    This change allows the SRC and DST of dma_start operations to be located in the
    same memory space. This applies to both the Affine dialect and Memref dialect
    versions of these Ops. The documention has been updated to reflect this by
    explicitly stating overlapping memory locations are not supported (undefined
    behavior).

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D102274




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