[all-commits] [llvm/llvm-project] b1a074: [AArch64][SVE] Fix missed immediate selection due ...

[Bradley Smith via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b1a074951ff78bf06a2d944c01ca0a0fcd63dd33
      https://github.com/llvm/llvm-project/commit/b1a074951ff78bf06a2d944c01ca0a0fcd63dd33
  Author: Bradley Smith <bradley.smith at arm.com>
  Date:   2021-05-13 (Thu, 13 May 2021)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/test/CodeGen/AArch64/sve-int-imm.ll

  Log Message:
  -----------
  [AArch64][SVE] Fix missed immediate selection due to mishandling of signedness

The complex selection pattern for add/sub shifted immediates is
incorrect in it's handling of incoming constant values, in that it
does not properly anticipate the values to be signed extended to
32-bits.

Co-authored-by: Graham Hunter <graham.hunter at arm.com>

Differential Revision: https://reviews.llvm.org/D101833