[all-commits] [llvm/llvm-project] edf9d8: [ARM] Precommit test for D101898
tmatheson-arm via All-commits
all-commits at lists.llvm.org
Wed May 12 01:44:08 PDT 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: edf9d88266376a693b07668f733034d2f6b22072
https://github.com/llvm/llvm-project/commit/edf9d88266376a693b07668f733034d2f6b22072
Author: Tomas Matheson <tomas.matheson at arm.com>
Date: 2021-05-12 (Wed, 12 May 2021)
Changed paths:
A llvm/test/CodeGen/ARM/atomicrmw_exclusive_monitor_ints.ll
Log Message:
-----------
[ARM] Precommit test for D101898
Differential Revision: https://reviews.llvm.org/D101912
Commit: 34c098b780a27a90b5614ea3b949b9269835f2a5
https://github.com/llvm/llvm-project/commit/34c098b780a27a90b5614ea3b949b9269835f2a5
Author: Tomas Matheson <tomas.matheson at arm.com>
Date: 2021-05-12 (Wed, 12 May 2021)
Changed paths:
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/test/CodeGen/ARM/atomicrmw_exclusive_monitor_ints.ll
Log Message:
-----------
[ARM] Prevent spilling between ldrex/strex pairs
Based on the same for AArch64: 4751cadcca45984d7671e594ce95aed8fe030bf1
At -O0, the fast register allocator may insert spills between the ldrex and
strex instructions inserted by AtomicExpandPass when expanding atomicrmw
instructions in LL/SC loops. To avoid this, expand to cmpxchg loops and
therefore expand the cmpxchg pseudos after register allocation.
Required a tweak to ARMExpandPseudo::ExpandCMP_SWAP to use the 4-byte encoding
of UXT, since the pseudo instruction can be allocated a high register (R8-R15)
which the 2-byte encoding doesn't support. However, the 4-byte encodings
are not present for ARM v8-M Baseline. To enable this, two new pseudos are
added for Thumb which are only valid for v8mbase, tCMP_SWAP_8 and
tCMP_SWAP_16.
The previously committed attempt in D101164 had to be reverted due to runtime
failures in the test suites. Rather than spending time fixing that
implementation (adding another implementation of atomic operations and more
divergence between backends) I have chosen to follow the approach taken in
D101163.
Differential Revision: https://reviews.llvm.org/D101898
Depends on D101912
Compare: https://github.com/llvm/llvm-project/compare/d8e65585f7c7...34c098b780a2
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