[all-commits] [llvm/llvm-project] 5b1610: [X86] AMD Zen 3: MOVSX32rr32 is a zero-cycle move

[Roman Lebedev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5b1610a25054b308d02be8882dd34bed3dc29ef4
      https://github.com/llvm/llvm-project/commit/5b1610a25054b308d02be8882dd34bed3dc29ef4
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2021-05-07 (Fri, 07 May 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86ScheduleZnver3.td

  Log Message:
  -----------
  [X86] AMD Zen 3: MOVSX32rr32 is a zero-cycle move

It measures as such, and the reference docs agree.

I can't easily add a MCA test, because there's no mnemonic for it,
it can only be disassembled or created as a MCInst.


  Commit: b8701dc1749e228b886e53bdb32eeebba00e30da
      https://github.com/llvm/llvm-project/commit/b8701dc1749e228b886e53bdb32eeebba00e30da
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2021-05-07 (Fri, 07 May 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86ScheduleZnver3.td

  Log Message:
  -----------
  [X86] AMD Zen 3: mark XMM/YMM (but not MMX!) reg moves as eliminatible in RegisterFile


Compare: https://github.com/llvm/llvm-project/compare/6a2850f3fc24...b8701dc1749e