[all-commits] [llvm/llvm-project] a8e30e: [NFC][X86][MCA] AMD Zen3: add test for zero-cycle ...

[Roman Lebedev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a8e30e63aca0e9c61f956e61303ae3694cf00f2c
      https://github.com/llvm/llvm-project/commit/a8e30e63aca0e9c61f956e61303ae3694cf00f2c
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2021-05-07 (Fri, 07 May 2021)

  Changed paths:
    A llvm/test/tools/llvm-mca/X86/Znver3/reg-move-elimination-x87.s

  Log Message:
  -----------
  [NFC][X86][MCA] AMD Zen3: add test for zero-cycle X87 move


  Commit: 2819009b5aa9725aebba63e8722e31943a7fb36f
      https://github.com/llvm/llvm-project/commit/2819009b5aa9725aebba63e8722e31943a7fb36f
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2021-05-07 (Fri, 07 May 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86ScheduleZnver3.td
    M llvm/test/tools/llvm-mca/X86/Znver3/reg-move-elimination-avx-xmm.s
    M llvm/test/tools/llvm-mca/X86/Znver3/reg-move-elimination-avx-ymm.s

  Log Message:
  -----------
  [X86] AMD Zen 3: _REV variants of zero-cycles moves are also zero-cycles (PR50261)

Sometimes disassembler picks _REV variants of instructions
over the plain ones, which in this case exposed an issue
that the _REV variants aren't being modelled as optimizable moves.


Compare: https://github.com/llvm/llvm-project/compare/70cbc6dbef70...2819009b5aa9