[all-commits] [llvm/llvm-project] 4ba872: [VPlan] Representing backedge def-use feeding redu...

[Florian Hahn via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4ba8720f8844ae740e9424f90487ec308a22f40c
      https://github.com/llvm/llvm-project/commit/4ba8720f8844ae740e9424f90487ec308a22f40c
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2021-05-04 (Tue, 04 May 2021)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/test/Transforms/LoopVectorize/vplan-printing.ll

  Log Message:
  -----------
  [VPlan] Representing backedge def-use feeding reduction phis.

This patch updates the code handling reduction recipes to also keep
track of the incoming value from the latch in the recipe. This is needed
to model the def-use chains completely in VPlan, so that it is possible
to replace the incoming value with an arbitrary VPValue.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D99294