[all-commits] [llvm/llvm-project] fb92cf: [RISCV] Pre-commit tests for D101342
Jessica Clarke via All-commits
all-commits at lists.llvm.org
Tue May 4 03:13:54 PDT 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: fb92cf92080d34f0bb0b2b0120086ee520f624b8
https://github.com/llvm/llvm-project/commit/fb92cf92080d34f0bb0b2b0120086ee520f624b8
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2021-05-04 (Tue, 04 May 2021)
Changed paths:
A llvm/test/CodeGen/RISCV/atomic-signext.ll
Log Message:
-----------
[RISCV] Pre-commit tests for D101342
These tests show inefficient sign extension for AMOs on RISC-V. The
normal CodeGen tests use anyext return values, but if marked signext
then we end up generating unnecessary sign extension instructions. This
can be seen when compiling C that returns an i32 (signed or unsigned),
where the calling convention results in a signext return value.
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