[all-commits] [llvm/llvm-project] 1db4db: Recommit "[VP, Integer, #2] ExpandVectorPredication ...

[Simon Moll via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1db4dbba24dd36bd5a91ed58bd9d92dce2060c9f
      https://github.com/llvm/llvm-project/commit/1db4dbba24dd36bd5a91ed58bd9d92dce2060c9f
  Author: Simon Moll <simon.moll at emea.nec.com>
  Date:   2021-05-04 (Tue, 04 May 2021)

  Changed paths:
    M llvm/include/llvm/Analysis/TargetTransformInfo.h
    M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
    A llvm/include/llvm/CodeGen/ExpandVectorPredication.h
    M llvm/include/llvm/CodeGen/MachinePassRegistry.def
    M llvm/include/llvm/CodeGen/Passes.h
    M llvm/include/llvm/IR/IntrinsicInst.h
    M llvm/include/llvm/InitializePasses.h
    M llvm/include/llvm/LinkAllPasses.h
    M llvm/lib/Analysis/TargetTransformInfo.cpp
    M llvm/lib/CodeGen/CMakeLists.txt
    A llvm/lib/CodeGen/ExpandVectorPredication.cpp
    M llvm/lib/CodeGen/TargetPassConfig.cpp
    M llvm/lib/IR/IntrinsicInst.cpp
    M llvm/test/CodeGen/AArch64/O0-pipeline.ll
    M llvm/test/CodeGen/AArch64/O3-pipeline.ll
    M llvm/test/CodeGen/ARM/O3-pipeline.ll
    A llvm/test/CodeGen/Generic/expand-vp.ll
    M llvm/test/CodeGen/X86/O0-pipeline.ll
    M llvm/test/CodeGen/X86/opt-pipeline.ll
    M llvm/tools/llc/llc.cpp
    M llvm/tools/opt/opt.cpp

  Log Message:
  -----------
  Recommit "[VP,Integer,#2] ExpandVectorPredication pass"

This reverts the revert 02c5ba8679873e878ae7a76fb26808a47940275b

Fix:

Pass was registered as DUMMY_FUNCTION_PASS causing the newpm-pass
functions to be doubly defined. Triggered in -DLLVM_ENABLE_MODULE=1
builds.

Original commit:

This patch implements expansion of llvm.vp.* intrinsics
(https://llvm.org/docs/LangRef.html#vector-predication-intrinsics).

VP expansion is required for targets that do not implement VP code
generation. Since expansion is controllable with TTI, targets can switch
on the VP intrinsics they do support in their backend offering a smooth
transition strategy for VP code generation (VE, RISC-V V, ARM SVE,
AVX512, ..).

Reviewed By: rogfer01

Differential Revision: https://reviews.llvm.org/D78203