[all-commits] [llvm/llvm-project] d7d85f: [AArch64][GlobalISel] Fix width value for G_SBFX/G...

[bcahoon via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d7d85f72ef9b45b45472611196f6b97305832b9a
      https://github.com/llvm/llvm-project/commit/d7d85f72ef9b45b45472611196f6b97305832b9a
  Author: Brendon Cahoon <brendon.cahoon at amd.com>
  Date:   2021-04-29 (Thu, 29 Apr 2021)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-sextinreg.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-sbfx.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-ubfx.mir

  Log Message:
  -----------
  [AArch64][GlobalISel] Fix width value for G_SBFX/G_UBFX

When creating G_SBFX/G_UBFX opcodes, the last operand is the
width instead of the bit position. The bit position is used
for the AArch64 SBFM and UBFM instructions. The bit position
is converted to a width if the SBFX/UBFX aliases are generated.
For other SBMF/UBFM aliases, such as shifts, the bit position
is used.

Differential Revision: https://reviews.llvm.org/D101543