[all-commits] [llvm/llvm-project] cca9b5: [AArch64] Add Machine InstCombiner patterns for FM...

[Andrew Savonichev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cca9b5985c0c7e3c34da7f2db7cc8e7e707b0e2e
      https://github.com/llvm/llvm-project/commit/cca9b5985c0c7e3c34da7f2db7cc8e7e707b0e2e
  Author: Andrew Savonichev <andrew.savonichev at gmail.com>
  Date:   2021-04-12 (Mon, 12 Apr 2021)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineCombinerPattern.h
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    M llvm/test/CodeGen/AArch64/arm64-fma-combines.ll
    A llvm/test/CodeGen/AArch64/machine-combiner-fmul-dup.mir

  Log Message:
  -----------
  [AArch64] Add Machine InstCombiner patterns for FMUL indexed variant

This patch adds DUP+FMUL => FMUL_indexed pattern to InstCombiner.
FMUL_indexed is normally selected during instruction selection, but it
does not work in cases when VDUP and VMUL are in different basic
blocks.

Differential Revision: https://reviews.llvm.org/D99662