[all-commits] [llvm/llvm-project] f30c42: [WebAssembly] Add shuffles as an option for loweri...

[Thomas Lively via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f30c429da63a0f7506770b926229486e74fda3b3
      https://github.com/llvm/llvm-project/commit/f30c429da63a0f7506770b926229486e74fda3b3
  Author: Thomas Lively <tlively at google.com>
  Date:   2021-04-09 (Fri, 09 Apr 2021)

  Changed paths:
    M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
    M llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
    A llvm/test/CodeGen/WebAssembly/simd-concat.ll

  Log Message:
  -----------
  [WebAssembly] Add shuffles as an option for lowering BUILD_VECTOR

When lowering a BUILD_VECTOR SDNode, we choose among various possible vector
creation instructions in an attempt to minimize the total number of instructions
used. We previously considered using swizzles, consts, and splats, and this
patch adds shuffles as well. A common pattern that now lowers to shuffles is
when two 64-bit vectors are concatenated. Previously, concatenations generally
lowered to sequences of extract_lane and replace_lane instructions when they
could have been a single shuffle.

Differential Revision: https://reviews.llvm.org/D100018