[all-commits] [llvm/llvm-project] 66c056: [RISCV][Clang] Add some RVV Integer intrinsic func...

[Zakk Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 66c05609e0d5b758295b3c20d3dde4f3c3cda673
      https://github.com/llvm/llvm-project/commit/66c05609e0d5b758295b3c20d3dde4f3c3cda673
  Author: Zakk Chen <zakk.chen at sifive.com>
  Date:   2021-04-06 (Tue, 06 Apr 2021)

  Changed paths:
    M clang/include/clang/Basic/riscv_vector.td
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vand.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vdiv.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmacc.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmadd.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmax.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmin.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmul.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnmsac.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnmsub.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vor.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vrem.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vrsub.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsll.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsra.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsrl.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsub.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vxor.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vand.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vdiv.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vmacc.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vmadd.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vmax.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vmin.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vmul.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vnmsac.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vnmsub.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vor.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vrem.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vrsub.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vsll.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vsra.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vsrl.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vsub.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vxor.c

  Log Message:
  -----------
  [RISCV][Clang] Add some RVV Integer intrinsic functions.

1. Rename RVVBinBuiltin to RVVOutputOp1Builtin because it is not related
to the number of operand.
2. Add RVV Integer instuctions which use RVVOutputOp1Builtin.

Reviewed By: craig.topper

Authored-by: Roger Ferrer Ibanez <rofirrim at gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen at sifive.com>

Differential Revision: https://reviews.llvm.org/D99524


  Commit: 0a18ea01f19757c7b94bab8d7a9130b78136c6c1
      https://github.com/llvm/llvm-project/commit/0a18ea01f19757c7b94bab8d7a9130b78136c6c1
  Author: Zakk Chen <zakk.chen at sifive.com>
  Date:   2021-04-06 (Tue, 06 Apr 2021)

  Changed paths:
    M clang/include/clang/Basic/riscv_vector.td
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnsra.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vnsrl.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vwmul.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vnsra.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vnsrl.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vwmul.c

  Log Message:
  -----------
  [RISCV][Clang] Add RVV vnsra, vnsrl and vwmul intrinsic functions.

Reviewed By: craig.topper

Authored-by: Roger Ferrer Ibanez <rofirrim at gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen at sifive.com>

Differential Revision: https://reviews.llvm.org/D99525


Compare: https://github.com/llvm/llvm-project/compare/f8f4d8f87ba4...0a18ea01f197