[all-commits] [llvm/llvm-project] a2ea00: [RISCV] Don't convert fshr/fshl to target specific...

Craig Topper via All-commits all-commits at lists.llvm.org
Sat Apr 3 23:18:12 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a2ea003fcb78b585f79c8458ff2ace8b79d192d0
      https://github.com/llvm/llvm-project/commit/a2ea003fcb78b585f79c8458ff2ace8b79d192d0
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-04-03 (Sat, 03 Apr 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoB.td

  Log Message:
  -----------
  [RISCV] Don't convert fshr/fshl to target specific FSL/FSR node if shift amount is a constant.

As long as it's a constant we can directly pattern match it
without any problems. It's only when it isn't a constant that
we need to add an AND.

In theory this should allow more target independent optimizations
to remain active.




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