[all-commits] [llvm/llvm-project] 3b48d8: [RISCV] Optimize more redundant VSETVLIs
Fraser Cormack via All-commits
all-commits at lists.llvm.org
Fri Apr 2 02:11:09 PDT 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 3b48d849d44367ff351f58ce7a4949d104a30dea
https://github.com/llvm/llvm-project/commit/3b48d849d44367ff351f58ce7a4949d104a30dea
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2021-04-02 (Fri, 02 Apr 2021)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCleanupVSETVLI.cpp
M llvm/test/CodeGen/RISCV/rvv/cleanup-vsetvli.mir
M llvm/test/CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll
Log Message:
-----------
[RISCV] Optimize more redundant VSETVLIs
D99717 introduced some test cases which showed that the output of one
vsetvli into another would not be picked up by the RISCVCleanupVSETVLI
pass. This patch teaches the optimization about such a pattern. The
pattern is quite common when using the RVV vsetvli intrinsic to pass the
VL onto other intrinsics.
The second test case introduced by D99717 is left unoptimized by this
patch. It is a rarer case and will require us to rewire any uses of the
redundant vset[i]vli's output to the previous one's.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D99730
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