[all-commits] [llvm/llvm-project] dadcd9: [RISCV] Add MULHU and MULHS tests with a constant ...

Craig Topper via All-commits all-commits at lists.llvm.org
Thu Apr 1 10:16:29 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: dadcd940f0897c125f568c7d355cc23c6a5544f4
      https://github.com/llvm/llvm-project/commit/dadcd940f0897c125f568c7d355cc23c6a5544f4
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-04-01 (Thu, 01 Apr 2021)

  Changed paths:
    M llvm/test/CodeGen/RISCV/mul.ll

  Log Message:
  -----------
  [RISCV] Add MULHU and MULHS tests with a constant operand.


  Commit: b7c2e577cc8f9f92b7ce206ea7d6cba3eaa3f98c
      https://github.com/llvm/llvm-project/commit/b7c2e577cc8f9f92b7ce206ea7d6cba3eaa3f98c
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-04-01 (Thu, 01 Apr 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoM.td
    M llvm/test/CodeGen/RISCV/mul.ll

  Log Message:
  -----------
  [RISCV] Add custom type legalization to form MULHSU when possible.

There's no target independent ISD opcode for MULHSU, so custom
legalize 2*XLen multiplies ourselves. We have to be a little
careful to prefer MULHU or MULHSU.

I thought about doing this in isel by pattern matching the
(add (mul X, (srai Y, XLen-1)), (mulhu X, Y)) pattern. I decided
against this because the add might become part of a chain of adds.
I don't trust DAG combine not to reassociate with other adds making
it difficult to find both pieces again.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D99479


Compare: https://github.com/llvm/llvm-project/compare/7d15fb577945...b7c2e577cc8f


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