[all-commits] [llvm/llvm-project] ce548a: [X86] AMD Zen 3 has macro fusion

[Roman Lebedev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ce548aa236962f95ccaf59f8692ed0861f3769dd
      https://github.com/llvm/llvm-project/commit/ce548aa236962f95ccaf59f8692ed0861f3769dd
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2021-03-31 (Wed, 31 Mar 2021)

  Changed paths:
    M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
    M llvm/lib/Target/X86/X86.td

  Log Message:
  -----------
  [X86] AMD Zen 3 has macro fusion

This is an improvement over Zen 2, where only branch fusion is supported,
as per Agner, 21.4 Instruction fusion.
AMD SOG 17h has no mention of fusion.

AMD SOG 19h, 2.9.3 Branch Fusion
The following flag writing instructions support branch fusion
with their reg/reg, reg/imm and reg/mem forms
* CMP
* TEST
* SUB
* ADD
* INC (no fusion with branches dependent on CF)
* DEC (no fusion with branches dependent on CF)
* OR
* AND
* XOR

Agner, 22.4 Instruction fusion
<...> This applies to CMP, TEST, ADD, SUB, AND, OR, XOR, INC, DEC and
all conditional jumps, except if the arithmetic or logic instruction has a rip-relative address or
both an address displacement and an immediate operand.