[all-commits] [llvm/llvm-project] 79a79d: [X86] Add test for PR49587 (NFC)
ShihPo Hung via All-commits
all-commits at lists.llvm.org
Tue Mar 30 14:31:29 PDT 2021
Branch: refs/heads/release/12.x
Home: https://github.com/llvm/llvm-project
Commit: 79a79d1d01c4c206d8de3569c72747587d929770
https://github.com/llvm/llvm-project/commit/79a79d1d01c4c206d8de3569c72747587d929770
Author: Nikita Popov <nikita.ppv at gmail.com>
Date: 2021-03-30 (Tue, 30 Mar 2021)
Changed paths:
A llvm/test/CodeGen/X86/pr49587.ll
Log Message:
-----------
[X86] Add test for PR49587 (NFC)
Shows a miscompile with FastISel.
(cherry picked from commit 0d814ca0f02733d6581bf209fadbebf3035380e0)
Commit: 38dd45b00431e2c065e172751492e0ded59e49e6
https://github.com/llvm/llvm-project/commit/38dd45b00431e2c065e172751492e0ded59e49e6
Author: Nikita Popov <nikita.ppv at gmail.com>
Date: 2021-03-30 (Tue, 30 Mar 2021)
Changed paths:
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/test/CodeGen/X86/pr49587.ll
Log Message:
-----------
[X86][FastISel] Fix with.overflow eflags clobber (PR49587)
If the successor block has a phi node, then additional moves may
be inserted into predecessors, which may clobber eflags. Don't try
to fold the with.overflow result into the branch in that case.
This is done by explicitly checking for any phis in successor
blocks, not sure if there's some more principled way to address
this. Other fused compare and branch patterns avoid the issue by
emitting the comparison when handling the branch, so that no
instructions may be inserted in between. In this case, the
with.overflow call is emitted separately (and I don't think this
is avoidable, as it will generally have at least two users).
Fixes https://bugs.llvm.org/show_bug.cgi?id=49587.
Differential Revision: https://reviews.llvm.org/D98600
(cherry picked from commit 7669455df49e6fc8ae7d9f4bd4ee95bb20e7eb6e)
Commit: 5b3480610383ba281ef0c7918a6c097058a408d4
https://github.com/llvm/llvm-project/commit/5b3480610383ba281ef0c7918a6c097058a408d4
Author: Sanjay Patel <spatel at rotateright.com>
Date: 2021-03-30 (Tue, 30 Mar 2021)
Changed paths:
M llvm/test/Transforms/InstCombine/zext-or-icmp.ll
Log Message:
-----------
[InstCombine] add test for zext-of-icmps; NFC
PR49475 shows an infinite loop outcome, but this
tries to show the root cause with a minimal test.
(cherry picked from commit 579b8fc2e97c489308f97b01d13d894c03c0a16c)
Commit: ff2cf8fafa5ad9a76e59fa086d969d4e2ecc3a39
https://github.com/llvm/llvm-project/commit/ff2cf8fafa5ad9a76e59fa086d969d4e2ecc3a39
Author: Sanjay Patel <spatel at rotateright.com>
Date: 2021-03-30 (Tue, 30 Mar 2021)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/zext-or-icmp.ll
Log Message:
-----------
[InstCombine] avoid creating an extra instruction in zext fold and possible inf-loop
The structure of this fold is suspect vs. most of instcombine
because it creates instructions and tries to delete them
immediately after.
If we don't have the operand types for the icmps, then we are
not behaving as assumed. And as shown in PR49475, we can inf-loop.
(cherry picked from commit 4224a36957420744756d6a6450eb6502a1bfadc3)
Commit: 9ae9ab1ca34384e07b751c16645e22a0b953b08b
https://github.com/llvm/llvm-project/commit/9ae9ab1ca34384e07b751c16645e22a0b953b08b
Author: ShihPo Hung <shihpo.hung at sifive.com>
Date: 2021-03-30 (Tue, 30 Mar 2021)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/test/MC/RISCV/rvv/aliases.s
M llvm/test/MC/RISCV/rvv/load.s
M llvm/test/MC/RISCV/rvv/store.s
Log Message:
-----------
[RISCV][MC] Fix nf encoding for vector ld/st whole register
The three bit nf is one less than the number of NFIELDS,
so we manually decrement 1 for VS1/2/4/8R & VL1/2/4/8R.
Differential revision: https://reviews.llvm.org/D98185
(cherry picked from commit rG5cdb2e98608bf57c216ee7067e8a12d070c9e2bd)
Compare: https://github.com/llvm/llvm-project/compare/f05b64961056...9ae9ab1ca343
More information about the All-commits
mailing list