[all-commits] [llvm/llvm-project] f06900: [RISCV] Remove floating point condition code legal...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f069000b433c3d08157a57b554a3a17c46cba04d
      https://github.com/llvm/llvm-project/commit/f069000b433c3d08157a57b554a3a17c46cba04d
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-03-30 (Tue, 30 Mar 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp

  Log Message:
  -----------
  [RISCV] Remove floating point condition code legalization from lowerFixedLengthVectorSetccToRVV.

After D98939, this is done by LegalizeVectorOps making this code dead.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D99519