[all-commits] [llvm/llvm-project] 7b3593: [RISCV] Add test case for mulhsu.

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7b35932b519a8989cdf74ff1fbd299905dd4eb85
      https://github.com/llvm/llvm-project/commit/7b35932b519a8989cdf74ff1fbd299905dd4eb85
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-03-28 (Sun, 28 Mar 2021)

  Changed paths:
    M llvm/test/CodeGen/RISCV/mul.ll

  Log Message:
  -----------
  [RISCV] Add test case for mulhsu.

We don't yet use mulhsu, but we should.


  Commit: 3fb40ce167ff5f05afadf8f525ff9e17350d6d7f
      https://github.com/llvm/llvm-project/commit/3fb40ce167ff5f05afadf8f525ff9e17350d6d7f
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-03-28 (Sun, 28 Mar 2021)

  Changed paths:
    M clang/lib/Headers/immintrin.h
    M clang/lib/Headers/vaesintrin.h
    M clang/lib/Headers/vpclmulqdqintrin.h

  Log Message:
  -----------
  [X86] Don't define vpclmulqdq or vaes intrinsics in the headers unless avx512fintrin.h has been included.

The intrinsics won't compile unless avx512fintrin.h has declared
the 512 bit types.


Compare: https://github.com/llvm/llvm-project/compare/fc9df309917e...3fb40ce167ff