[all-commits] [llvm/llvm-project] c40cea: [RISCV] Teach targetShrinkDemandedConstant to pres...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c40cea6f083a8a67ea950e058e16d37bb04e8c4b
      https://github.com/llvm/llvm-project/commit/c40cea6f083a8a67ea950e058e16d37bb04e8c4b
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-03-25 (Thu, 25 Mar 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoB.td
    M llvm/test/CodeGen/RISCV/alu32.ll
    M llvm/test/CodeGen/RISCV/rv64zba.ll

  Log Message:
  -----------
  [RISCV] Teach targetShrinkDemandedConstant to preserve (and X, 0xffffffff).

We look for this pattern frequently in isel patterns so its a
good idea to try to preserve it.

This also let's us remove our special isel handling for srliw
and use a direct pattern match of (srl (and X, 0xffffffff), C)
since no bits will be removed from the and mask.

Differential Revision: https://reviews.llvm.org/D99042