[all-commits] [llvm/llvm-project] 88c2d4: [RISCV][Clang] Add RVV Vector Indexed Load intrins...

[Zakk Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 88c2d4c8eb0eabb43f8511c95e8cb772e7bc6a64
      https://github.com/llvm/llvm-project/commit/88c2d4c8eb0eabb43f8511c95e8cb772e7bc6a64
  Author: Zakk Chen <zakk.chen at sifive.com>
  Date:   2021-03-23 (Tue, 23 Mar 2021)

  Changed paths:
    M clang/include/clang/Basic/riscv_vector.td
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vloxei.c
    A clang/test/CodeGen/RISCV/rvv-intrinsics/vluxei.c
    M clang/utils/TableGen/RISCVVEmitter.cpp

  Log Message:
  -----------
  [RISCV][Clang] Add RVV Vector Indexed Load intrinsic functions.

Support Complex type transformer to define more complexity legal type.

Overall our downstream implementation there are only four instructions need to
use complex type transformer, it's not a common case.
I still feel using a string for prototypes is simple and clear.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D98848