[all-commits] [llvm/llvm-project] fcdf7f: [RISCV] Give an explicit error if 'generic' CPU is...
Craig Topper via All-commits
all-commits at lists.llvm.org
Sun Mar 14 17:22:06 PDT 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: fcdf7f6224610a51dc2ff47f2f1e3377329b64a7
https://github.com/llvm/llvm-project/commit/fcdf7f6224610a51dc2ff47f2f1e3377329b64a7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2021-03-14 (Sun, 14 Mar 2021)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
Log Message:
-----------
[RISCV] Give an explicit error if 'generic' CPU is passed instead of 'generic-rv32' or 'generic-rv64'. Validate 64Bit feature against the triple.
I encountered a project that uses llvm that passes "generic" by
default. While I could fix that project, I wouldn't be surprised
if other projects did something similar. So it seems like
a good idea to provide a better error here.
I've also added validation of the 64Bit feature against the
triple so that we can catch a mismatched CPU before failing in
a mysterious way. We can make it pretty far in isel because we
calculate XLenVT from the triple and use that to set up the legal
integer type.
Reviewed By: luismarques, khchen
Differential Revision: https://reviews.llvm.org/D98307
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