[all-commits] [llvm/llvm-project] 8b540c: [PowerPC] Implement patterns for PC-Rel zextload/e...

[Amy Kwan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8b540c542ce3a73aba1848c6e931b46bc647bc8d
      https://github.com/llvm/llvm-project/commit/8b540c542ce3a73aba1848c6e931b46bc647bc8d
  Author: Amy Kwan <amy.kwan1 at ibm.com>
  Date:   2021-03-10 (Wed, 10 Mar 2021)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCInstrPrefix.td
    A llvm/test/CodeGen/PowerPC/pcrel-byte-loads.ll

  Log Message:
  -----------
  [PowerPC] Implement patterns for PC-Rel zextload/extload byte loads

This patch adds patterns to select the PC-Relative extloadi1 and zextloadi1 byte loads.

Differential Revision: https://reviews.llvm.org/D98042