[all-commits] [llvm/llvm-project] 4c973a: [PowerPC] Reduce symmetrical swaps for lane-insens...

[Qiu Chaofan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4c973ae51b859dca9792e1ad87a6673c49815a8d
      https://github.com/llvm/llvm-project/commit/4c973ae51b859dca9792e1ad87a6673c49815a8d
  Author: Qiu Chaofan <qiucofan at cn.ibm.com>
  Date:   2021-03-10 (Wed, 10 Mar 2021)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
    A llvm/test/CodeGen/PowerPC/swap-reduction.ll

  Log Message:
  -----------
  [PowerPC] Reduce symmetrical swaps for lane-insensitive vector ops

This patch simplifies pattern (xxswap (vec-op (xxswap a) (xxswap b)))
into (vec-op a b) if vec-op is lane-insensitive. The motivating case
is ScalarToVector-VecOp-ExtractElement sequence on LE, but the
peephole itself is not related to endianness, so BE may also benefit
from this.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D97658