[all-commits] [llvm/llvm-project] 478317: [RISCV] Make the hasStdExtM() check in RISCVInstrI...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 478317fbb79034694df934900665f363dd6c9a70
      https://github.com/llvm/llvm-project/commit/478317fbb79034694df934900665f363dd6c9a70
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-03-09 (Tue, 09 Mar 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h

  Log Message:
  -----------
  [RISCV] Make the hasStdExtM() check in RISCVInstrInfo::getVLENFactoredAmount emit a diagnostic rather than an assert.

As far as I know we're not enforcing the StdExtM must be enabled
to use the V extension. If we use an assert here and hit this
code in a release build we'll silently emit an invalid instruction.

By using a diagnostic we report the error to the user in release
builds. I think there may still be a later fatal error from
the code emitter though.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D97970